noa2a22 standard cell family

 2×2-AND into 2-NOR gate
noa2a22 symbol
The noa2a22_x1 is a single stage AND-OR-Invert with P/N ratio of 1.7. The noa2a22_x4 is a 3 stage AND-OR-Invert with stage efforts of about 1.7 and 3.9.
nq:((i2*i3)+(i0*i1))' cell width power Generic 0.13um typical timing (ps & ps/fF), pin i1.
leakage dynamic tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
ssxlib013 gates lambda 0.13um nW nW/MHz PinCap PropR RampR PropF RampF
noa2a22_x1 2.3  70 3.85 1.39  14.9  6.2f  52  2.73  44  1.94
noa2a22_x4 3.7 110 6.05 2.43  55.4  3.8f 167  0.76 162  0.61
noa2a22_x1
 
Effort
FO4 Log.
i0 /\ 1.54 1.64
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i1 /\ 1.51 1.68
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i2 /\ 1.93 1.75
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i3 /\ 1.89 1.77
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noa2a22_x1 schematic noa2a22_x1 standard cell layout
noa2a22_x4
 
Effort
FO4 Log.
i0 /\ 2.56 0.28
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i1 /\ 2.51 0.30
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i2 /\ 2.96 0.28
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i3 /\ 2.90 0.30
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noa2a22_x4 schematic noa2a22_x4 standard cell layout
Web data book for the ssxlib. Vdd=1.2V, T=27°C, nominal process, generic 0.13um technology.   Copyright © 2005-2008 Graham Petley.  11 JAN 2008