nao22 standard cell family
2-OR into 2-NAND gate
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The nao22_x1 is a single stage OR-AND-Invert with P/N ratio of 1.7 for pins
i0
and
i1
, and about 3.3 for pin
i2
. The nao22_x4 is a 3 stage OR-AND-Invert with stage efforts of about 1.7 and 3.9 for pins
i0
and
i1
, and 1.3 and 3.9 for pin
i2
.
nq:((i0+i1)*i2)'
cell width
power
Generic 0.13um typical timing (ps & ps/fF), pin
i1
.
leakage
dynamic
tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
ssxlib013
gates
lambda
0.13um
nW
nW/MHz
PinCap
PropR
RampR
PropF
RampF
nao22_x1
2.0
60
3.30
1.16
14.1
6.1f
54
2.98
43
1.94
nao22_x4
3.3
100
5.50
2.31
55.6
3.7f
174
0.76
162
0.61
nao22_x1
Effort
FO4
Log.
i0
/\
1.70
1.77
¯_
i1
/\
1.56
1.75
¯_
i2
/\
1.33
1.26
¯_
nao22_x4
Effort
FO4
Log.
i0
/\
2.71
0.28
¯_
i1
/\
2.56
0.30
¯_
i2
/\
2.43
0.31
¯_
Web data book for the ssxlib. V
dd
=1.2V, T=27°C, nominal process, generic 0.13um technology. Copyright © 2005-2008 Graham Petley. 11 JAN 2008