oan21 standard cell family

 2-OR into 2-AND gate
oan21 symbol
Minimum drive strength cell with a P/N ratio of about 2 on the output and a stage gain of about 1.6.
z:((a1+a2)*b) cell width power Generic 0.13um typical timing (ps & ps/fF), pin a2.
leakage dynamic tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
wsclib013 gates lambda 0.13um nW nW/MHz PinCap PropR RampR PropF RampF
oan21v0x05 2.7  64 3.52  0.59  13.1  2.7f  82  4.97 113  3.96
oan21v0x05
 
Effort
FO4 Log.
a1 /\
¯_ 2.20
a2 /\
¯_ 2.08
b /\
¯_ 1.73
oan21v0x05 schematic oan21v0x05 standard cell layout
Web data book for the wsclib. Vdd=1.2V, T=27°C, nominal process, generic 0.13um technology.   Copyright © 2005-2008 Graham Petley.  11 JAN 2008