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x8 Drive Strength for Critical Path Cells

  
gate count               1625
number of cells           538
number of library cells   179
number of used cells       54
max fanin                  17
max input capacitance     214
max internal fanout        34
critical path  0fF       2111
critical path  6fF       2497

Now an x8 drive strength is added for those functions where its size is not too big:

an2v0x8    an3v0x8    aoi21v0x8
nd2v0x8    nd2av0x8   nd2abv0x8
nd3v0x8    nr2v0x8    nr2av0x8
oai21v0x8  or2v0x8    or3v0x8

a total of 12 new cells.

The x8 cells give a 1.0% speed improvement at the cost of an area increase of 0.9%. The x8, x6, x4 and x3 drive strength usage is:

        x3   x4   x6   x8
an2      0    0    0    2
aoi22    0    1    -    -
cgi2    17    -    -    -
iv1      3    6   10    4
nd2a     0    0    1    0
nd4      1    -    -    -
nr2      1    0    1    0
nr2a     0    1    0    0
oai21   13    5    2   10
xaon21   1    -    -    -
xoon21   2    -    -    -
xor2     8    1    -    -
      +----+----+----+----+
TOTAL   46   14   14   16

17% of the cells have a drive strength bigger than x2. As before, the bulk of the x8 usage is with the oai21v0x8 cells.

The speed of the critical path is limited by the carry generator inverting cells, cgi2, which have a maximum drive strength of x3. The parallel critical path of oai21 cells has been buffered up so that it is faster than this one. This path though has some x8 drive strength cells which contribute to it being slightly faster than the previous experiments.

    x 2          17                  182
 1  iv1v0x12     24  a->z      303   121
 2  nr2v0x6       1  b->z      360    57
 3  xoon21v0x3    1  b->z      455    95
 4  xor2v0x3      1  b->z      540    85
 5  cgi2v0x3      3  c->z      646   106
 6  iv1v0x6       1  a->z      695    49
 7  cgi2v0x3      3  c->z      793    98
 8  iv1v0x4       1  a->z      848    55
 9  cgi2v0x3      3  c->z      954   106
10  iv1v0x6       1  a->z     1002    48
11  cgi2v0x3      3  c->z     1107   105
12  iv1v0x6       1  a->z     1156    49
13  cgi2v0x3      3  c->z     1252    96
14  iv1v0x3       1  a->z     1315    63
15  cgi2v0x3      3  c->z     1422   107
16  iv1v0x6       1  a->z     1471    49
17  cgi2v0x3      4  c->z     1581   110
18  xnr3v1x2      1  b->z     1790   209
19  cgi2v0x3      2  c->z     1879    89
20  iv1v0x6       1  a->z     1928    49
21  cgi2v0x3      2  c->z     2016    88
22  iv1v0x6       1  a->z     2065    49
23  cgi2v0x3      2  c->z     2147    82
24  an2v0x8       2  b->z     2250   103
25  an2v0x8       2  b->z     2361   111
26  xaon21v0x3    0  a2->z    2497   136
    r 15

Table of synthesis results  
  critical path (ps) gate count cell count porosity library cells used cells
synthesis 1 4279 1561 923 43%   9  8 basic inverters, NAND & NOR gates
synthesis 2 4236 1472 792 45%  15 12 AND & OR gates
synthesis 3 4157 1357 696 46%  19 16 AOI & OAI gates, 2/1 and 2/2
synthesis 4 4157 1357 696 46%  20 16 mxi2 2-way inverting mux
synthesis 5 3983 1343 668 48%  21 16 cgi2 carry generator inverting
synthesis 6 3948 1352 668 48%  28 18 inverters with multiple drive strengths
synthesis 7 3061 1433 666 51%  70 27 x2 drive strengths for all functions
synthesis 8 3056 1456 666 52%  70 30 BOOG with x1 drive strengths
synthesis 9 2960 1476 666 53%  70 32 BOOG with x05 drive strengths
synthesis 10 2963 1480 666 53%  76 34 nd2a and nr2a cells
synthesis 11 2963 1480 666 53%  79 34 nd2ab type of 2-OR
CyHP library 3778 1539 832 46%  18 17 Minimum size library
synthesis 12 2908 1362 553 54%  91 38 AND/OR into XOR/XNOR
synthesis 13 2893 1378 551 55% 103 39 aoi211, aoi31, oai211 & oai31
synthesis 14 2931 1400 562 55% 104 38 3-XOR gate, 1/2 stage delays
synthesis 15 2886 1390 536 56% 109 40 3-XOR/XNOR gates as 2×2-I/P gates
synthesis 16 2665 1514 538 60% 136 46 x3 drive strength cells
synthesis 17 2567 1571 540 61% 155 49 x4 drive strength cells
synthesis 18 2523 1611 540 62% 167 49 x6 drive strength cells
synthesis 19 2497 1625 538 62% 179 54 x8 drive strength cells
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