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gate count 1717 number of cells 535 number of library cells 188 number of used cells 55 max fanin 3 max input capacitance 35 max internal fanout 39 critical path 0fF 2193 critical path 6fF 2550 |
In this experiment we check three "standard" Alliance synthesis flows. A standard Alliance synthesis flow uses the same library for both BOOG and LOON, and not a special BOOG library with its own timing. One problem with this is that BOOG will crash with the vsclib library with the message
Library Error: No cell could match ''1''This is caused by the large number of non-inverting buffers. So actually, a special BOOG library must be made, which is a copy of the LOON one with the buffers removed. The three experiments are:
export MBK_TARGET_LIB=../vsclib013_0_nobuf boog -x 0 -m 3 multi8_o export MBK_TARGET_LIB=../vsclib013_0 loon -x 0 -l loon1 multi8_o multi8_0 export MBK_TARGET_LIB=../vsclib013_6 loon -x 0 -l loon1 multi8_o multi8_6 |
The loon1.lax file is found to give the best results. The input resistance is set to 1kΩ; the output load to 50f; and the synthesis priority to 1.
##loon1.lax
#M{1}
#I{
x(0):1000;
...
y(7):1000;
}
#C{
r(15):50;
...
r(0):50;
} |
export MBK_TARGET_LIB=../vsclib013_6_nobuf boog -x 0 -m 3 multi8_o export MBK_TARGET_LIB=../vsclib013_6 loon -x 0 -l loon1 multi8_o multi8_6 export MBK_TARGET_LIB=../vsclib013_0 loon -x 0 -l loon1 multi8_o multi8_0 |
For the 6f wireload, LOON synthesis with a priority of 4 gives the best result. For the 0f wireload, a priority of 1 is best.
The three results are compared below with the final result obtained from the previous experiment.
| Table of synthesis results | |||||
| crit path 0fF | crit path 6fF | gate count | cell count | ||
| 0fF wireload | 2373 | 2788 | 1541 | 504 | |
| 6fF wireload | 2414 | 2808 | 1662 | 520 | |
| optimised | 2193 | 2550 | 1717 | 535 | |
| previous | 2142 | 2441 | 1758 | 563 | |
The fastest speed comes from the flow previously developed, but at the cost of a higher gate count. For a simple flow of one LOON synthesis, the best results come when using BOOG with a 0fF wireload library.
The next experiment will be to remove the little used cells and see what impact this has on the performance and area.
| Table of synthesis results | |||||||
| critical path (ps) | gate count | cell count | porosity | library cells | used cells | ||
| synthesis 1 | 4279 | 1561 | 923 | 43% | 9 | 8 | basic inverters, NAND & NOR gates |
| synthesis 2 | 4236 | 1472 | 792 | 45% | 15 | 12 | AND & OR gates |
| synthesis 3 | 4157 | 1357 | 696 | 46% | 19 | 16 | AOI & OAI gates, 2/1 and 2/2 |
| synthesis 4 | 4157 | 1357 | 696 | 46% | 20 | 16 | mxi2 2-way inverting mux |
| synthesis 5 | 3983 | 1343 | 668 | 48% | 21 | 16 | cgi2 carry generator inverting |
| synthesis 6 | 3948 | 1352 | 668 | 48% | 28 | 18 | inverters with multiple drive strengths |
| synthesis 7 | 3061 | 1433 | 666 | 51% | 70 | 27 | x2 drive strengths for all functions |
| synthesis 8 | 3056 | 1456 | 666 | 52% | 70 | 30 | BOOG with x1 drive strengths |
| synthesis 9 | 2960 | 1476 | 666 | 53% | 70 | 32 | BOOG with x05 drive strengths |
| synthesis 10 | 2963 | 1480 | 666 | 53% | 76 | 34 | nd2a and nr2a cells |
| synthesis 11 | 2963 | 1480 | 666 | 53% | 79 | 34 | nd2ab type of 2-OR |
| CyHP library | 3778 | 1539 | 832 | 46% | 18 | 17 | Minimum size library |
| synthesis 12 | 2908 | 1362 | 553 | 54% | 91 | 38 | AND/OR into XOR/XNOR |
| synthesis 13 | 2893 | 1378 | 551 | 55% | 103 | 39 | aoi211, aoi31, oai211 & oai31 |
| synthesis 14 | 2931 | 1400 | 562 | 55% | 104 | 38 | 3-XOR gate, 1/2 stage delays |
| synthesis 15 | 2886 | 1390 | 536 | 56% | 109 | 40 | 3-XOR/XNOR gates as 2×2-I/P gates |
| synthesis 16 | 2665 | 1514 | 538 | 60% | 136 | 46 | x3 drive strength cells |
| synthesis 17 | 2567 | 1571 | 540 | 61% | 155 | 49 | x4 drive strength cells |
| synthesis 18 | 2523 | 1611 | 540 | 62% | 167 | 49 | x6 drive strength cells |
| synthesis 19 | 2497 | 1625 | 538 | 62% | 179 | 54 | x8 drive strength cells |
| synthesis 20 | 2493 | 1628 | 541 | 62% | 188 | 55 | buffers to decouple non-critical paths |
| synthesis 21 | 2441 | 1758 | 563 | 64% | 188 | 55 | input buffers |
| synthesis 22 | 2550 | 1717 | 535 | 64% | 188 | 55 | optimised Alliance flow |
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