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gate count 1512 number of cells 538 number of library cells 136 number of used cells 49 max fanin 17 max input capacitance 207 max internal fanout 34 critical path 0fF 2173 critical path 6fF 2647 |
An x3 drive strength is added for all functions unless they are already so big that an x3 drive strength cell would be excessively large. By large, we mean here cells becoming much above 160λ or 20 tracks wide.
This means that an x3 drive strength has been added to all functions except
aoi211 nr4 oai31 xnr3 xooi21 xor3
For the xnr3, xor3 and xooi21 gates, an x3 drive strength is handled by coding the cell as a netlist. For example, the xnr3v1x3 is made from an xnr2v0x2 and an xor2v0x3.
The purpose of this experiment is to improve the critical path by allowing the use of higher drive cells. The critical path from the previous experiment consists of x2 drive strength cells plus higher drive inverters, and looks maxed out in drive strength.
The higher drive strengths that are chosen by LOON out of the total drive strengths are shown below. 12% of all cells have been buffered up to an x3 drive strength, and the speed has improved by 7.7% as a consequence at the cost of an 8.9% area increase.
an2v0x3 2/3 aoi22v0x3 2/28 cgi2v0x3 12/21 iv1v0x3 2/79 nd2av0x3 1/1 nr2av0x3 1/1 nr2v0x3 1/92 nr3v0x3 1/8 oai21v0x3 28/31 xaon21v0x3 2/2 xoon21v0x3 2/35 xor2v0x3 11/99 TOTAL 65/538 |
The critical path is now mostly x3 drive strength cells and higher drive inverters, as shown below. The conclusion is that high drive gates are useful. The next experiments will extend the range of drive strengths for each function until the cell width bumps up against a 20 track or so limit.
x 1 17 210
1 nd4v0x2 1 d->z 291 81
2 oai21v0x3 4 b->z 393 102
3 iv1v0x4 1 a->z 446 53
4 oai21v0x3 4 a2->z 562 116
5 iv1v0x4 1 a->z 615 53
6 oai21v0x3 4 a2->z 741 126
7 iv1v0x4 1 a->z 794 53
8 oai21v0x3 4 a2->z 907 113
9 iv1v0x4 1 a->z 959 52
10 oai21v0x3 4 a2->z 1075 116
11 xor2v0x1 1 b->z 1244 169
12 cgi2v0x3 3 b->z 1359 115
13 iv1v0x6 1 a->z 1408 49
14 cgi2v0x3 3 c->z 1518 110
15 iv1v0x6 1 a->z 1567 49
16 cgi2v0x3 4 c->z 1681 114
17 iv1v0x3 1 a->z 1730 49
18 nd2av0x3 1 a->z 1839 109
19 oai21v0x3 3 b->z 1944 105
20 xor2v0x3 1 b->z 2041 97
21 cgi2v0x3 2 a->z 2141 100
22 iv1v0x6 1 a->z 2190 49
23 cgi2v0x3 2 c->z 2267 77
24 an2v0x3 2 b->z 2385 118
25 an2v0x3 2 b->z 2529 144
26 xaon21v0x3 0 a2->z 2665 136
r 15 |
| Table of synthesis results | |||||||
| critical path (ps) | gate count | cell count | porosity | library cells | used cells | ||
| synthesis 1 | 4279 | 1561 | 923 | 43% | 9 | 8 | basic inverters, NAND & NOR gates |
| synthesis 2 | 4236 | 1472 | 792 | 45% | 15 | 12 | AND & OR gates |
| synthesis 3 | 4157 | 1357 | 696 | 46% | 19 | 16 | AOI & OAI gates, 2/1 and 2/2 |
| synthesis 4 | 4157 | 1357 | 696 | 46% | 20 | 16 | mxi2 2-way inverting mux |
| synthesis 5 | 3983 | 1343 | 668 | 48% | 21 | 16 | cgi2 carry generator inverting |
| synthesis 6 | 3948 | 1352 | 668 | 48% | 28 | 18 | inverters with multiple drive strengths |
| synthesis 7 | 3061 | 1433 | 666 | 51% | 70 | 27 | x2 drive strengths for all functions |
| synthesis 8 | 3056 | 1456 | 666 | 52% | 70 | 30 | BOOG with x1 drive strengths |
| synthesis 9 | 2960 | 1476 | 666 | 53% | 70 | 32 | BOOG with x05 drive strengths |
| synthesis 10 | 2963 | 1480 | 666 | 53% | 76 | 34 | nd2a and nr2a cells |
| synthesis 11 | 2963 | 1480 | 666 | 53% | 79 | 34 | nd2ab type of 2-OR |
| CyHP library | 3778 | 1539 | 832 | 46% | 18 | 17 | Minimum size library |
| synthesis 12 | 2908 | 1362 | 553 | 54% | 91 | 38 | AND/OR into XOR/XNOR |
| synthesis 13 | 2893 | 1378 | 551 | 55% | 103 | 39 | aoi211, aoi31, oai211 & oai31 |
| synthesis 14 | 2931 | 1400 | 562 | 55% | 104 | 38 | 3-XOR gate, 1/2 stage delays |
| synthesis 15 | 2886 | 1390 | 536 | 56% | 109 | 40 | 3-XOR/XNOR gates as 2×2-I/P gates |
| synthesis 16 | 2665 | 1514 | 538 | 60% | 136 | 46 | x3 drive strength cells |
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