nd4 standard cell family
4-I/P NAND gate
The P/N ratio is set to 2.5, which is close to the P/N ratio of 2.6 which gives the fastest speed, as well as balanced rise and fall drive strengths.
z:(a*b*c*d)'
cell width
power
Generic 0.13um typical timing (ps & ps/fF), pin d.
leakage
dynamic
tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
lambda
0.13um
nW
nW/MHz
PinCap
PropR
RampR
PropF
RampF
nd4v0x05
50
2.75
0.60
6.3
3.2f
58
5.96
44
5.43
nd4v0x1
50
2.75
1.02
9.8
5.1f
55
3.51
42
3.26
nd4v0x2
80
4.40
1.50
14.2
7.2f
53
2.38
40
2.17
nd4v0x3
96
5.28
1.92
18.6
9.1f
54
1.86
42
1.71
nd4v0x05
nd4v0x1
nd4v0x2
nd4v0x3