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aoi22 standard cell family |
2× 2-AND into 2-NOR gate |
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3 cells with different drive strengths, each with a P/N ratio of about 2. The Ramp Rise time reported below is an average of when one or the other or both of the P-transistors connected to b2 and b1 are on. The .LIB file has the precise timing for each case. |
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z:((a1*a2)+(b1*b2))' |
cell width |
power |
Generic 0.13um typical timing (ps & ps/fF), pin a2. |
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leakage |
dynamic |
tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF) |
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lambda |
0.13um |
nW |
nW/MHz |
PinCap |
PropR |
RampR |
PropF |
RampF |
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| aoi22v0x05 |
50 |
2.75 |
0.53 |
6.4 |
3.2f |
82 |
6.77 |
71 |
5.41 |
| aoi22v0x1 |
50 |
2.75 |
0.90 |
10.0 |
5.0f |
77 |
4.01 |
67 |
3.13 |
| aoi22v0x2 |
90 |
4.95 |
1.87 |
20.3 |
9.9f |
75 |
1.93 |
65 |
1.50 |
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