oai22 standard cell family
2× 2-OR into 2-NAND gate
3 cells with different drive strengths, each with a P/N ratio of about 2. The Ramp Fall time reported below is an average of when one or the other or both of the N-transistors connected to b2 and b1 are on. This is an approximation. The .LIB file has the correct timing for each case.
z:((a1+a2)*(b1+b2))'
cell width
power
Generic 0.13um typical timing (ps & ps/fF), pin a2.
leakage
dynamic
tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
lambda
0.13um
nW
nW/MHz
PinCap
PropR
RampR
PropF
RampF
oai22v0x05
50
2.75
0.53
6.6
3.3f
76
7.34
59
4.89
oai22v0x1
50
2.75
0.88
10.9
5.1f
74
4.34
58
2.80
oai22v0x2
90
4.95
1.59
22.0
9.9f
71
2.09
56
1.36
oai22v0x05
oai22v0x1
oai22v0x2