vlsitechnology.org /2LM sclib /synthesis /scripts /find_fanin

find_fanin

Chapter

Section

Use

find_fanin input_file

Description

Script expands vectored inputs to their individual bits and then counts the occurences of these strings in the VHDL structural description of input_file.vst. The list excludes vdd and vss.

Arguments

input_file

The structural VHDL netlist input_file.vst.

Depends on

No dependencies.

Bugs

Needs a clean VHDL file syntax as produced by loon, flatlo or x2y.

Operation

Vectored inputs are split into their separate bits and together with unvectored inputs, the occurences between key word begin and the end of the file are counted. Supply nets vdd and vss are excluded. The first input with the maximum fanin is also listed.

Download find_fanin
Example
$ ./find_fanin in_file 
x(0)= 12
x(1)= 16
x(2)= 14
x(3)= 13
x(4)= 11
x(5)= 15
x(6)= 14
x(7)= 27
y(0)= 10
y(1)= 23
y(2)= 10
y(3)= 20
y(4)= 11
y(5)= 21
y(6)= 11
y(7)= 16
Max fanin is x(7)= 27